1. Field of the Invention
Embodiments of the invention relate to a large area organic light emitting diode display having a uniformed luminescence throughout the display area. Especially, the embodiments of the invention relate to an organic light emitting diode display having a uniformed luminescence throughout the large display area such as a large flat panel television set.
2. Discussion of the Related Art
Nowadays, various flat panel display devices are being developed for overcoming many drawbacks of the cathode ray tube such as heavy weight and bulk volume. The flat panel display devices include a liquid crystal display device (LCD), a field emission display (FED), a plasma display panel (PDP) and an electroluminescence device (EL).
FIG. 1 is a plane view illustrating a structure of an organic light emitting diode display (‘OLED’) having active switching elements such as thin film transistors according to a related art. FIG. 2 is a cross sectional view illustrating the structure of the OLED along a cutting line of II-II′ in FIG. 1 according to the related art.
Referring to FIGS. 1 and 2, the OLED comprises a thin film transistor (‘TFT’) substrate having thin film transistors ST and DT, an organic light emitting diode OD connected to and driven by the thin film transistors ST and DT, and a cap ENC joining and facing the TFT substrate with an organic adhesive POLY therebetween. The TFT substrate includes a switching thin film transistor ST, a driving thin film transistor DT connected to the switching thin film transistor ST, and the organic light emitting diode OD connected to the driving thin film transistor DT.
On a transparent substrate SUB, the switching thin film transistor ST is formed where a gate line GL and a data line DL cross each other. The switching thin film transistor ST acts for selecting a pixel which is connected to the switching thin film transistor ST. The switching thin film transistor ST includes a gate electrode SG branching from the gate line GL, a semiconductor channel layer SA overlapping with the gate electrode SG, a source electrode SS and a drain electrode SD. The driving thin film transistor DT acts for driving an anode electrode ANO of the organic light emitting diode OD disposed at the pixel selected by the switching thin film transistor ST. The driving thin film transistor DT includes a gate electrode DG connected to the drain electrode SD of the switching thin film transistor ST, a semiconductor channel layer DA, a source electrode DS connected to the driving current line VDD, and a drain electrode DD. The drain electrode DD of the driving thin film transistor DT is connected to the anode electrode ANO of the organic light emitting diode OD.
As one example, FIG. 2 shows a thin film transistor of a top gate structure. In this instance, the semiconductor channel layers SA and DA of the switching thin film transistor ST and the driving thin film transistor DT, respectively, are firstly formed on the substrate SUB and the gate insulating layer GI covers them, and then the gate electrodes SG and DG are formed thereon by overlapping with center portions of the semiconductor channel layers SA and DA. After that, at both sides of the semiconductor channel layers SA and DA, the source electrodes SS and DS and the drain electrodes SD and DD are connected thereto, respectively, through contact holes penetrating an insulating layer IN. The source electrodes SS and DS and the drain electrodes SD and DD are formed on the insulating layer IN.
In addition, at the outer area surrounding the display area where the pixel area is disposed, a gate pad GP formed at one end of the gate line GL, a data pad DP formed at one end of the data line DL, and a driving current pad VDP formed at one end of the driving current line VDD are arrayed. A passivation layer PAS is disposed to cover the upper whole surface of the substrate SUB having the switching and the driving thin film transistors ST and DT. After that, formed are the contact holes exposing the gate pad GP, the data pad DP, the driving current pad VDP and the drain electrode DD of the driving thin film transistor DT. Over the display area within the substrate SUB, a planar layer PL is coated. The planar layer PL makes more smooth a roughness of an upper surface of the substrate SUB, for coating organic materials that form the organic light emitting diode on the smooth and planar surface of the substrate SUB.
On the planar layer PL, the anode electrode ANO is formed to connect to the drain electrode DD of the driving thin film transistor DT through one of the contact holes. On the other hand, at the outer area of the display area not having the planar layer PL, formed are a gate pad electrode GPT, a data pad electrode DPT and a driving current electrode VDPT connected to the gate pad GP, the data pad DP and the driving current pad VDP, respectively, and exposed through the contact holes. On the substrate SUB, a bank BA is formed covering the display area, except for the pixel area. Finally, a spacer SP may be formed over some portion of the bank BA.
A cap ENC is joined to the TFT substrate having above mentioned structure with the constant gap therebetween, due to the spacer SP. In that instance, it is preferable that the TFT substrate and the cap ENC are completely sealed by having an organic adhesive POLY disposed between them. The gate pad electrode GPT and the data pad electrode DPT exposed to the exterior of the cap ENC may be connected to external devices via various connecting means.
When the OLED having the above mentioned structure is applied to a large display such as large flat panel television set, there may be a lot of problems which are not expected and/or occur in a small area display such as a cellular phone, a personal digital device and so on. Therefore, when applying OLED technology to a large area display, consideration of many conditions which are not considered for the small area display may be required.
For example, when manufacturing a large area OLED display, a length of each electric signal lines including the gate line GL, the data line DL and the driving current line VDD should be elongated as a size of an OLED panel is increased. As the electric signal line is elongated, line resistance is also increases. Such increase in the line resistance may cause a voltage dropdown problem in which a voltage is lowered under a normal operating condition. When the voltage dropdown occurs, luminescence and/or brightness of the OLED panel is not evenly distributed over the whole area of the OLED panel. Actually, in an instance of an OLED of which a diagonal length is over 20 inches and is driven by 20A of electric currents, according to the related art, a luminescence difference between a brightest point (i.e., a beginning point of the electric current line) and a darkest point (i.e., an end point of the electric current line) may be over 37%.